1. Field of Invention
The invention relates to electrostatic discharge (ESD) prevention techniques and more particularly to a method of searching paths that are susceptible to ESD at the beginning of an integrated circuit (IC) design.
2. Description of Related Art
In manufacturing, assembling, packaging, and delivering of electronic devices and even at the time of using an electronic device by a user, there is pretty high probability of damaging the electronic device due to electrostatic discharge (ESD). Thus, a variety of ESD protection structures and circuits are provided and mounted in an electronic device. For example, when a deep submicron system-on-a-chip (SoC) is employed in a semiconductor manufacturing process, the SoC is susceptible to ESD. Thus, internal components of SoC may be severely damaged by momentary unwanted currents. For the protection of SoC, an ESD protection circuit is provided to eliminate ESD.
ESD protection is even more important for semiconductor manufacturing industry. Typically, eight principles for ESD protection are outlined below.
1. Preventing critical signal lines from disposing near lines to be protected;
2. arranging interfaces together at one side as possible as it can be;
3. avoiding protected loops connecting in parallel to loops that are not protected;
4. designing an area around a loop consisting of different signal lines and their feeders to be as small as possible, and even considering to change positions of signal lines or ground wires if necessary;
5. keeping homing, interrupting, and controlling signals far from input/output (I/O) ports and the edges of a printed circuit board (PCB);
6. connecting interface signal lines and ground lines to a component to be protected and to other parts of the loop;
7. making use of highly integrated components and a diode array that may not only greatly save space of a circuit board but also lower the self inductance of a parasite circuit that is caused by a complicated loop; and
8. adding ground points if it is possible.
Of the above eight principles, principles 1 through 5 are well known to a circuit designer. However, even if the five principles are fully carried out, they cannot completely prevent the components of SoC from being damaged by ESD.
The five principles at most can decrease the probability of an electric device being damaged by ESD. It is not perfect. Principles 6 and 7 are the most important ones in the current ESD protection technology. Parallel connection is made to components protected by a circuit in which many options are available for the protected components. Such is disclosed in U.S. Pat. Nos. 6,906,357, 6,894,881, 6,730,968, and 6,274,911.
Typically, in IC protection a diode is employed because diode can be easily integrated with other components of a chip. For example, there are components provided with the functions of electromagnetic interference (EMI) prevention and radio frequency interference (RFI) prevention being integrated with the diodes. This not only reduces the number of components employed in IC design (and thus saves cost) but also avoids self-inductance caused at the time of IC layout on a PCB. A diode for transient voltage suppression (TVS) diode is typically employed as a protection component against ESD generated in an IC. Compared with a conventional Zener diode (ZD), TVS diode is capable of withstanding higher voltage and has a lower voltage cut-off ratio. Thus, TVS diode provides a better effect on voltage loop protection.
Thus, it is desirable to provide a novel method of searching paths that are susceptible to ESD at the beginning of an IC design in order to overcome the inadequacies of the prior art.